• Data are now output per TDC channel
• The Trigger TDC is allways channel 0
• The mapping between TDC and PETIROC is direct:
  • Channel 1 of TDC Channel 0 of PETIROC
  • ..
  • Channel 24 of TDC Channel 23 of PETIROC
  • It allows to extend easily the number of channels and will only force to resolder adapter boards
• The default clock is now 40 MHz so counts of BXID and Absolute BXID are in 25 ns. The absolute BXID is only reset at the first acquisition after Power On.

The output of a FEB now consists of:

• A Header packet :

It's a fixed length packet of 76 or 140 bytes. Then each NON EMPTY TDC is sending one packet

• TDC packet

Header	Channel number	Number of Measurements	payload
2bytes B0B0	1 byte	ncx 1bytes	ncx channel info

• BXID 3 bytes (40 MHz clock since Start Of Acquisition front)
• Coarse 1 byte (400 MHz count in the BXID)
• fine 1 byte (fine TDC value 2.5 ns/256)

On trigger the state machine is only modified before calling the readout FSM: