cable_chamber
Differences
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cable_chamber [2018/04/02 09:00] acqilc [Geometry] |
cable_chamber [2021/07/10 23:21] (current) |
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| Line 4: | Line 4: | ||
| Four FEBs intsalled from external to middle: | Four FEBs intsalled from external to middle: | ||
| - | * TDC 5, First serie | + | * TDC 5, First serie, strip 1-12 |
| - | * TDC 8, Second serie | + | * TDC 8, Second serie, strip 13-24, |
| - | * TDC 6, second serie | + | * TDC 6, second serie, strip 25-36 |
| - | * TDC 7, second serie | + | * TDC 7, second serie, strip 37-48 |
| Each of it is reading 12 strips both side. The mapping of the 12 strips is the following: | Each of it is reading 12 strips both side. The mapping of the 12 strips is the following: | ||
| ^Strip ^ TDC channel High Radius ^ TDC channel Low Radius ^ | ^Strip ^ TDC channel High Radius ^ TDC channel Low Radius ^ | ||
| - | |1| 10 | 14 | | + | |1| 10 |14| |
| - | |2| 6 | 11 | | + | |2| 6 |11| |
| - | |3| 2 |7 | | + | |3| 2 |7| |
| - | |4| 0 | 3 | | + | |4| 0 |3| |
| - | |5| 4 | 1 | | + | |5| 4 |1| |
| - | |6| 8 | 5 | | + | |6| 8 |5| |
| - | |7| 12 | 9 | | + | |7| 12 |9| |
| - | |8| 16 | 13 | | + | |8| 16 |13| |
| - | |9| 18 | 15 | | + | |9| 18 |15| |
| - | |10| 20 | 17 | | + | |10| 20 |17| |
| - | |11| 22 | 19 | | + | |11| 22 |19| |
| - | |12| missing | 21 | | + | |12| missing (23) |21| |
| + | The channel 23 is not connected to a lemo in the current version of firmware. Upgrade version of firmware with the correct connection will require a new calibration of Petirocs DAC | ||
| + | ===== Pedestals ===== | ||
| + | --- //[[laurent.mirabito@gmail.com|DAQ user]] 2018/04/02 11:03// | ||
| + | |||
| + | Run 739605,606 and 607 were done to align all pedestal to VThTime @ 480 | ||
| + | |||
| + | |||
| + | The settings for starting a run are: | ||
| + | <code> | ||
| + | # 4 FEBS aligned 491+15 | ||
| + | daqcontrol --daq-download --dbstate=FE1_24CH_29 | ||
| + | daqcontrol --daq-setvth --vth=506 | ||
| + | daqcontrol --daq-configure | ||
| + | daqcontrol --trig-spillof --clock=10000 | ||
| + | daqcontrol --trig-spillon --clock=100000 | ||
| + | # 499 for TDC5 and 494 for TDC8 in DB | ||
| + | #daqcontrol --daq-setvth --vth=500 | ||
| + | daqcontrol --trig-spillreg --value=4 | ||
| + | |||
| + | </code> | ||
cable_chamber.1522659617.txt.gz · Last modified: 2021/07/10 23:20 (external edit)
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